From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] morphing 6600 code to use power decoder
Date: Thu, 9 Apr 2020 02:21:54 +0100
Message-ID: <CAPweEDzz4=cd90=e21oYZn1OphRpcFsoWhLf0aMoTtJnjOcFMA@mail.gmail.com> (raw)
In-Reply-To: <393761a54bdab5a0ca52e05bbdedf330@f-cpu.org>
On Thursday, April 9, 2020, <whygee@f-cpu.org> wrote:
>
> Could you please elaborate on your system ?
> Is there some sort of buffer to store the immediates
> while waiting for other operands to be ready ?
it's literally as described in Mitch's book chapters. minor alterations
are documented here
https://libre-soc.org/3d_gpu/architecture/6600scoreboard/
you can see in the CompUnit, a latch for immediates and a latch for reg
operands.
one bit says "latch the immediate instead of operand2 as the 2nd input to
the ALU".
very simple.
l.
--
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Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-08 13:26 Luke Kenneth Casson Leighton
2020-04-09 0:47 ` whygee
2020-04-09 1:21 ` Luke Kenneth Casson Leighton [this message]
2020-04-10 15:01 ` Luke Kenneth Casson Leighton
2020-04-11 11:20 ` Luke Kenneth Casson Leighton
2020-04-12 12:32 ` Luke Kenneth Casson Leighton
2020-04-13 14:16 ` Luke Kenneth Casson Leighton
2020-04-13 17:46 ` whygee
2020-04-13 18:27 ` Luke Kenneth Casson Leighton
2020-04-14 19:12 ` Luke Kenneth Casson Leighton
2020-04-16 12:19 ` Luke Kenneth Casson Leighton
2020-04-16 15:41 ` Luke Kenneth Casson Leighton
2020-04-18 11:06 ` Luke Kenneth Casson Leighton
2020-04-23 17:16 ` Luke Kenneth Casson Leighton
2020-04-24 20:11 ` Luke Kenneth Casson Leighton
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