[libre-riscv-dev] AMD ISAs

[libre-riscv-dev] AMD ISAs

[Yehowshua]

All of AMDs ISA are open here.
https://gpuopen.com/documentation/amd-isa-documentation/ <https://gpuopen.com/documentation/amd-isa-documentation/>

It may be worthwhile trying to make our GPU “appear” to be an AMD device.
We wouldn’t have to write any drivers. At all.

Yehowshua
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Re: [libre-riscv-dev] AMD ISAs

[Yehowshua]

We could have a fake "PCIE AMD-like GPU" that AMD drivers talk to.
This device then issues instructions on the CPU/GPU hybrid.

Yehowshua

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Re: [libre-riscv-dev] AMD ISAs

[Yehowshua]

I still support the path of writing our own drivers tailored to our
hybrid device in the future - but the AMD approach could definitely 
be a low resistance path for our initial efforts.

Thoughts?

Yehowshua

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Re: [libre-riscv-dev] AMD ISAs

[Jacob Lifshay]

On Tue, Jun 9, 2020, 16:17 Yehowshua <yimmanuel3@gatech.edu> wrote:

> We could have a fake "PCIE AMD-like GPU" that AMD drivers talk to.
> This device then issues instructions on the CPU/GPU hybrid.
>

we would run into issues with AMD's (and other's) patents, I'm pretty sure
they haven't licensed the patents necessary to implement an AMD-compatible
GPU.

Also, that would defeat the purpose of a lot of what we're implementing
with a Power compatible ISA, having the CPU and GPU be the same processor,
and having an extensible design such that someone could add their own
custom operations on top of our code if they wanted.

Jacob
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Re: [libre-riscv-dev] AMD ISAs

[Yehowshua]

> Also, that would defeat the purpose of a lot of what we're implementing
> with a Power compatible ISA, having the CPU and GPU be the same processor,
> and having an extensible design such that someone could add their own
> custom operations on top of our code if they wanted.

Noted. Well, it was an interesting idea while it lasted.

Yehowshua
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Re: [libre-riscv-dev] AMD ISAs

[Luke Kenneth Casson Leighton]

On Wed, Jun 10, 2020 at 1:59 AM Yehowshua <yimmanuel3@gatech.edu> wrote:

> > Also, that would defeat the purpose of a lot of what we're implementing
> > with a Power compatible ISA, having the CPU and GPU be the same processor,
> > and having an extensible design such that someone could add their own
> > custom operations on top of our code if they wanted.
>
> Noted. Well, it was an interesting idea while it lasted.

it's worth going over.  in a similar way, we exhaustively evaluated
different ISAs to consider: MIPS, OpenRISC1200, and so on.  AMDGPU did
have the advantage of MIAOW being a subset implementation of that ISA:
still as you can see it's not enough, because of the strong
simplification advantages of a hybrid CPU.

l.

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Re: [libre-riscv-dev] AMD ISAs

[Luke Kenneth Casson Leighton]

On Wed, Jun 10, 2020 at 12:15 AM Yehowshua <yimmanuel3@gatech.edu> wrote:
>
> All of AMDs ISA are open here.
> https://gpuopen.com/documentation/amd-isa-documentation/ <https://gpuopen.com/documentation/amd-isa-documentation/>
>
> It may be worthwhile trying to make our GPU “appear” to be an AMD device.

the problem with doing so is that the processor effectively becomes
"Dual ISA".  everyone that we've talked to with significant experience
in processor design has raised eyebrows at the complexity involved in
a dual-ISA design.

it is not an insurmountable issue: it just should in no way be
underestimated, for the trade-off of not having to write any kinds of
drivers.

in addition, we need to consider that the level of instruction
compression (which reduces shared L1 I-Cache usage) anticipated
through the hardware-level compression in SimpleV will be completely
unobtainable for AMDGPU ISA interoperability... because we will be
forced *to* have AMDGPU ISA interoperability.

l.

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Re: [libre-riscv-dev] AMD ISAs

[Yehowshua]

> On Jun 9, 2020, at 7:21 PM, Luke Kenneth Casson Leighton <lkcl@lkcl.net> wrote:
> 
> in addition, we need to consider that the level of instruction
> compression (which reduces shared L1 I-Cache usage) anticipated
> through the hardware-level compression in SimpleV will be completely
> unobtainable for AMDGPU ISA interoperability... because we will be
> forced *to* have AMDGPU ISA interoperability.

This is a valid point.
I’ll get back to you on this.
I feel like there is a good way to do this...

Yehowshua
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