From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
Date: Tue, 21 Apr 2020 14:32:17 +0000
Message-ID: <bug-217-13-Hdzvb3eRjG@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-217-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=217
--- Comment #73 from Jean-Paul.Chaput@lip6.fr ---
(In reply to Luke Kenneth Casson Leighton from comment #72)
> ok i managed to:
>
> * crush doAluFlat.py down to 465x800
>
> * crush doAlu.py down to 520x840
>
> visually you can see that there is plenty of room for improvement,
> it is quite fascinating to examine.
Yes. What would be very informative is to try with increasing size
of blocks (16, 32, 64, 128 bits) to see if the "flat" advantage
persists.
I'm pretty sure we can further compress with an optimized manual
routing of the inter-block (especially by using M2+M4 correct
balance for vertical routing)
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[not found] <bug-217-13@https.bugs.libre-soc.org/>
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2020-03-12 11:57 [libre-riscv-dev] [Bug 217] New: " bugzilla-daemon
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