From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
Date: Tue, 21 Apr 2020 22:21:55 +0000
Message-ID: <bug-217-13-trtkJ1y3D4@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-217-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=217
--- Comment #87 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Jean-Paul.Chaput from comment #86)
> > this will be extremely tedious because it requires moving the netlists
> > as well.
>
> Something similar is done for the clock tree. It is nightmarish,
> don't go that way.
:)
the alternative is that we do it at the HDL level. create the series of
"modules" ehich result in separate actual VST files, link_add0_sub0_out0.vst
etc.
also tedious :)
> > what is *really* needed is, to be able to pass a **LIST** of Cells
> > to Etesian.create(). (actually, a list of Instances)
> I see no problem implementing that feature,
that would be extremely cool.
it will have many uses, in combination with the netlist subset finder we can
have much better control over placement, without complicating the HDL.
> but will do it next
> week. I'm long overdue to help an intern...
no problem. thank you JP.
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[not found] <bug-217-13@https.bugs.libre-soc.org/>
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2020-03-12 11:57 [libre-riscv-dev] [Bug 217] New: " bugzilla-daemon
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