[libre-riscv-dev] [Bug 269] auto-conversion / parser of POWER ISA Spec v3.0B

[bugzilla-daemon@libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=269

--- Comment #28 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Michael Nolan from comment #27)
> Hmm. I figured I'd be able to create a class with multiple types of
> instruction (so I can use loads and arithmetic instructions) like so:
> 
> class ISA(fixedarith, fixedload, fixedstore, ...):
> 
> But it seems that the different superclasses interfere with each other when
> they initialize their instrs dict by doing "instrs = {}"

funny, i just wrote about this:
http://bugs.libre-riscv.org/show_bug.cgi?id=272#c19

> Is there a better way to do this?

i don't know about "better", one possibility is to use uniquely-named
dictionaries

commit 9276f73c76a342af9555bb4dd255f348c297f3ab (HEAD -> master, origin/master)
Author: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date:   Sun Apr 5 19:54:30 2020 +0100

    drop instr info into uniquely-named dict

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