From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file
Date: Sun, 03 May 2020 13:23:01 +0000
Message-ID: <bug-296-13-2dmCg6cseX@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-296-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=296
--- Comment #13 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
https://libre-soc.org/3d_gpu/architecture/regfile/
created a new page (for regfiles in general), it's a near-duplicate
of a very early diagram written out last year, except this time
the PartitionedSignal-baesd Pipelines, and Function Units, as well as
the cyclic buffers, are now included.
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Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-01 2:09 [libre-riscv-dev] [Bug 296] New: " bugzilla-daemon
2020-05-01 2:10 ` [libre-riscv-dev] [Bug 296] " bugzilla-daemon
2020-05-01 2:10 ` bugzilla-daemon
2020-05-01 3:02 ` bugzilla-daemon
2020-05-01 5:03 ` bugzilla-daemon
2020-05-01 18:19 ` bugzilla-daemon
2020-05-01 18:33 ` bugzilla-daemon
2020-05-01 18:54 ` bugzilla-daemon
2020-05-01 19:12 ` bugzilla-daemon
2020-05-01 20:23 ` bugzilla-daemon
2020-05-02 2:01 ` bugzilla-daemon
2020-05-02 13:15 ` bugzilla-daemon
2020-05-02 15:02 ` bugzilla-daemon
2020-05-03 11:58 ` bugzilla-daemon
2020-05-03 13:23 ` bugzilla-daemon [this message]
2020-05-03 14:07 ` bugzilla-daemon
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