[libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file

[bugzilla-daemon@libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=296

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
as can be seen from the comp.arch discussion, a cyclic buffer on *each Function
Unit*
seems to have some advantages over just having a global cyclic buffer.

in particular, we discussed 18 months ago the merits of an idea by Mitch Alsup
to use *only* 1R-or-1W SRAMs on the regfile, with serial reads followed by
FMAC (the example) pipeline stages and a single write.  it's extremely
efficient
resource-utilisation on parallel workloads.

the problem with that idea is that it absolutely sucks for scalar code.

turns out that if we have a cyclic buffer and turn the "dedicated" RD1/2/3
WR1/2
Broadcast Buses into "general-purpose read / write buses", that we get the best
of both worlds:

* in the scalar case, a 3-operand FunctionUnit may use *three* Broadcast Buses
  to receive operand1, operand2 and operand3 in a single cycle

* in the parallel case (or during heavy loading) the lack of availability of
  all but one of the available buses does *not* stop a Function Unit from
  receiving its operands.  even if it takes 3 cycles to receive operands over
  just the one Bus, the fact that it will *also* take 3 cycles to rotate those
  values into the correct Operand Latches *does not matter*

(Yehowshua, this is partly where / why the extra gates of a Benes / Butterfly
Network are overkill: *all* operands need to be delivered before the operation
can proceed, which leaves time to shuffle things into place).

what does need to be thought through is to preserve the read/write
Dependencies.
the crucial one is not reads: those can drop their dependency the moment that
the operand is received (even into the cyclic buffer), however writes
definitely
cannot.

whilst they can be _delivered_ via the forwarding bus, the Function Unit *must*
remain busy (not be sent a "Go_Write" signal which will tell it to drop the
dependency) until its result has reached the regfile.

and "in any of the cyclic buffers" is *not* the regfile.

so that needs a little more thought.

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