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* [libre-riscv-dev] Following the PowerISA
@ 2020-04-06  2:46 Immanuel, Yehowshua U
  2020-04-06  2:51 ` Immanuel, Yehowshua U
  2020-04-06 10:51 ` Luke Kenneth Casson Leighton
  0 siblings, 2 replies; 7+ messages in thread
From: Immanuel, Yehowshua U @ 2020-04-06  2:46 UTC (permalink / raw)
  To: Libre-RISCV General Development

On the website, we have:

> The Libre RISC-V Project is building a hybrid CPU/GPU SoC. As the name of the project implies, 
> we will be following the RISC-V ISA due to it being open-source and also because of the huge 
> software and hardware ecosystem building around it. 

Since we are now doing userspace RISCV+POWER and system-wide POWER, I imagine this section should be updated?
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^ permalink raw reply	[flat|nested] 7+ messages in thread

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Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-06  2:46 [libre-riscv-dev] Following the PowerISA Immanuel, Yehowshua U
2020-04-06  2:51 ` Immanuel, Yehowshua U
2020-04-06  3:40   ` Immanuel, Yehowshua U
2020-04-06  6:28     ` Immanuel, Yehowshua U
2020-04-06  7:02       ` Jacob Lifshay
2020-04-06 10:58   ` Luke Kenneth Casson Leighton
2020-04-06 10:51 ` Luke Kenneth Casson Leighton

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