From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 316] bperm TODO
Date: Tue, 19 May 2020 19:16:42 +0000
Message-ID: <bug-316-13-DXaPEFSxFh@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-316-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=316
--- Comment #49 from Cole Poirier <colepoirier@gmail.com> ---
(In reply to Michael Nolan from comment #48)
> Cole, since your module passes your formal proof, I think it might be a good
> idea to try hooking it up to the logical pipeline, and adding a test for it.
>
> To hook it up, you're going to want to open up logical/main_stage.py and
> take a look at what's there for OP_CNTZ. You're going to want to do
> something similar to that for OP_BPERM using your Bpermd module.
>
> To add a test for bperm, you'll want to open up
> logical/test/test_pipe_caller.py and duplicate the function `test_cmpb`.
> You'd then want to modify this copy to have a different name, execute the
> bpermd instruction instead of cmpb, and possibly have different data for
> registers 1 and 2. Again, happy to help if you get stuck
Sure that sounds like a good plan. I was planning on taking the proof luke
provided yesterday, and trying to speed it up by using an Array() as he
suggested instead of nested [i][j] for loops. Should I try connecting the
module or making the proof modification first? And thank you again for your
extreme generosity in offering to help, and in all the help you've given me so
far :)
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