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From: whygee@f-cpu.org
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] circuitjs
Date: Tue, 28 Apr 2020 21:10:35 +0200
Message-ID: <53b2c9c32fa29f5525945fb6e1a072dc@f-cpu.org> (raw)
In-Reply-To: <CAC2bXD5mBJff_+56LFAANFL0hdHtZ_T--1BvjeTq2YxQKSsk_A@mail.gmail.com>

On 2020-04-28 16:53, Jacob Lifshay wrote:
>> https://github.com/sharpie7/circuitjs1/commit/323f530ce4c409316e2bab8277636deced3070fc
wait, YOU did it ? :-O
awesome !
For now I play with :
incremeters http://tinyurl.com/y7mseqfd
Carry-lookahead adders
complete ALU datapath http://tinyurl.com/rhonlsz
latches http://tinyurl.com/y8jjxd2x
shift registers, sequencers and so on,
very low-level but absolutely indispensable...
circuitjs has many quirks and bugs but
the qualities are not matched yet.

>> being able to have *interactive*
>> subsets of the circuits we're deploying would be absolutely fantastic.
that's all the point of a recently published article I wrote about it.
Can Jacob tell the developers about it ? :-)

> If we were to try to run much more than some really simple circuits, it
> would need things like multi-bit buses and a much faster simulator and
> subcircuits (though I think it may already have subcircuits).
I have not run into hard limitations so far, except screen size :-D

> BTW, the offline Java version is quite a bit faster than the online 
> version
> which is made using a Java to Javascript translator (GWT).
for now speed is not the point for me :
on hackaday.io we use circuitjs a LOT to discuss circuit topologies,
ping and pong ideas at each other, demonstrate stuff...

the circuitjs system allows sharing with much fewer limits than "normal 
programs"
and can be embedded in tutorials and educational webpage. A bit of JS 
could
detect a click to swap an <img> into an <iframe> that simulate the 
principle.

For number theory I have used JS-animated SVG but it's so painful and 
long to write,
but Luke could "build" the scoreboard before our eyes in a long HTML 
page,
showing each sub-element one by one and assembling them, then show their 
combined
behaviours...

The scheduler has long reached a state where even Luke has difficulties 
managing
its subtleties so that method would not only help him, but more 
importantly OTHERS
so they can take over his work when needed. So far, I don't feel I could 
ever,
despite my little understanding of the CDC6600.

>> i'm even tempted to suggest putting in a new NLNet Grant request to 
>> cover it.
> Maybe write a BLIF to CircuitJS translator :)
> allows us to export from yosys to circuitjs
I've been considering finding ways to convert from/to circuitjs
to/from VHDL... that would be a killer.
At least a "filter" to transform the .txt outputs, recognize
the basic gates and map them to those of my library (or sxlib)
and/or vice versa.

> Jacob
yg

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  parent reply index

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-23  6:49 [libre-riscv-dev] memory interface diagram woes Jacob Lifshay
2020-04-23  9:02 ` Luke Kenneth Casson Leighton
2020-04-23 10:29   ` Luke Kenneth Casson Leighton
2020-04-23 14:37     ` Luke Kenneth Casson Leighton
2020-04-26 12:27 ` Luke Kenneth Casson Leighton
2020-04-27  6:06   ` Jacob Lifshay
2020-04-27 10:07     ` Luke Kenneth Casson Leighton
2020-04-27 10:25       ` Luke Kenneth Casson Leighton
2020-04-27 12:38         ` Luke Kenneth Casson Leighton
     [not found]           ` <CAPweEDwtjksKH3odd0gfeBbLhVVPm=KD3auoihJq4X+-ROOg6g@mail.gmail.com>
2020-04-28 13:33             ` whygee
2020-04-28 14:26               ` Luke Kenneth Casson Leighton
2020-04-28 14:38                 ` Jacob Lifshay
2020-04-28 14:43                   ` Luke Kenneth Casson Leighton
2020-04-28 14:53                     ` [libre-riscv-dev] circuitjs Jacob Lifshay
2020-04-28 15:03                       ` Luke Kenneth Casson Leighton
2020-04-28 15:10                         ` Jacob Lifshay
2020-04-28 15:35                           ` Luke Kenneth Casson Leighton
2020-04-28 19:37                             ` [libre-riscv-dev] HTTaP and Design for Test (was Re: circuitjs) whygee
2020-04-28 19:10                       ` whygee [this message]
2020-04-28 15:28                     ` [libre-riscv-dev] memory interface diagram woes Luke Kenneth Casson Leighton
2020-04-28 16:30                       ` Luke Kenneth Casson Leighton
2020-04-29 15:10                         ` Luke Kenneth Casson Leighton

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