From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] memory interface diagram woes
Date: Thu, 23 Apr 2020 10:02:18 +0100
Message-ID: <CAPweEDy7dXU7c-Rd==bwQEcuBdhHJ8PQNSX-sfBnCXXeJw3_gw@mail.gmail.com> (raw)
In-Reply-To: <CAC2bXD4xkEJFTaPo7gKG9ejMvJyNtoA2zbDEKVqHk8abFv-jVg@mail.gmail.com>
On Thursday, April 23, 2020, Jacob Lifshay <programmerjake@gmail.com> wrote:
> I had an idea for a memory interface design that I've been slowly
> working on for more than a week, though have not been able to draw it
> out adequately because I keep getting frustrated by the lack of nice,
> power-of-2 alignment features and support for structurally recursive
> diagrams in Dia and the lack of copy-paste when using physical paper.
doh :)
there is a reason why i write things out as diagrams (and why i look at
graphviz all the time). they map easier in my head to gates, and as a
result it becomes possible to check that it hasn't any surprise pathways in
HW
> I'll try to write it out as text on the wiki tomorrow.
ok.
> It is a bit different than the design Luke came up with and I think it
> addresses several of that design's shortcomings.
ok i can grok that.
thanks for explaining jacob.
--
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-23 6:49 Jacob Lifshay
2020-04-23 9:02 ` Luke Kenneth Casson Leighton [this message]
2020-04-23 10:29 ` Luke Kenneth Casson Leighton
2020-04-23 14:37 ` Luke Kenneth Casson Leighton
2020-04-26 12:27 ` Luke Kenneth Casson Leighton
2020-04-27 6:06 ` Jacob Lifshay
2020-04-27 10:07 ` Luke Kenneth Casson Leighton
2020-04-27 10:25 ` Luke Kenneth Casson Leighton
2020-04-27 12:38 ` Luke Kenneth Casson Leighton
[not found] ` <CAPweEDwtjksKH3odd0gfeBbLhVVPm=KD3auoihJq4X+-ROOg6g@mail.gmail.com>
2020-04-28 13:33 ` whygee
2020-04-28 14:26 ` Luke Kenneth Casson Leighton
2020-04-28 14:38 ` Jacob Lifshay
2020-04-28 14:43 ` Luke Kenneth Casson Leighton
2020-04-28 14:53 ` [libre-riscv-dev] circuitjs Jacob Lifshay
2020-04-28 15:03 ` Luke Kenneth Casson Leighton
2020-04-28 15:10 ` Jacob Lifshay
2020-04-28 15:35 ` Luke Kenneth Casson Leighton
2020-04-28 19:37 ` [libre-riscv-dev] HTTaP and Design for Test (was Re: circuitjs) whygee
2020-04-28 19:10 ` [libre-riscv-dev] circuitjs whygee
2020-04-28 15:28 ` [libre-riscv-dev] memory interface diagram woes Luke Kenneth Casson Leighton
2020-04-28 16:30 ` Luke Kenneth Casson Leighton
2020-04-29 15:10 ` Luke Kenneth Casson Leighton
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