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From: Yehowshua <yimmanuel3@gatech.edu>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] Understanding the LibreSOC core
Date: Mon, 8 Jun 2020 14:46:36 -0400
Message-ID: <A1761A3D-5C92-4A5C-88A7-D544068D8523@gatech.edu> (raw)
In-Reply-To: <CAPweEDz5XeFCXTzhJ0j6WyWe=3FbZb2nb29QXr2yRvseJhZQZA@mail.gmail.com>



> On Jun 8, 2020, at 2:24 PM, Luke Kenneth Casson Leighton <lkcl@lkcl.net> wrote:
> 
> yes absolutely!  there is a EUR 10,000 budget allocated to this task:
> https://bugs.libre-soc.org/show_bug.cgi?id=22 <https://bugs.libre-soc.org/show_bug.cgi?id=22>
Hey Luke! I totally forgot about this.
I should have my thesis done by end of June - crossing fingers.

I would like to work on that - popping LibreSOC ontop of LiteX and stuffing it
in my VersaECP5 - hope it fits - I’m a LiteX veteran at this point.
This would be at the beginning of July.

Can we get a gate count for this: http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/007828.html

Here’s to hoping its below 400k - otherwise - yeah…

Yehowshua
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Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-08 18:03 Sanjay Menon
2020-06-08 18:24 ` Luke Kenneth Casson Leighton
2020-06-08 18:46   ` Yehowshua [this message]
2020-06-08 18:55     ` Luke Kenneth Casson Leighton
2020-06-08 18:58       ` Yehowshua
2020-06-08 19:01         ` Sanjay Menon
2020-06-08 19:09           ` Yehowshua
2020-06-08 19:14         ` Yehowshua
2020-06-08 20:38           ` Luke Kenneth Casson Leighton
2020-06-08 20:46             ` Luke Kenneth Casson Leighton
2020-06-08 21:19             ` Michael Nolan
2020-06-08 22:17               ` Luke Kenneth Casson Leighton
2020-06-08 22:18                 ` Luke Kenneth Casson Leighton
2020-06-08 20:11       ` Michael Nolan
2020-06-08 20:12         ` Yehowshua
2020-06-08 20:31           ` Luke Kenneth Casson Leighton
2020-06-08 19:02     ` Luke Kenneth Casson Leighton
2020-06-08 19:05       ` Yehowshua

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