From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 216] LOAD STORE buffer needed
Date: Wed, 06 May 2020 08:29:36 +0000
Message-ID: <bug-216-13-95DmbMas26@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-216-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=216
--- Comment #36 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Jacob Lifshay from comment #35)
> The proposed single-op-at-a-time interface would work through PortInterface,
> since you already wrote a lot of the code needed to work with it.
the code i wrote is sufficient to get me to the point where i can test
LDSTCompUnit.
it already does exactly what you propose.
as a concept, it is "technically correct" and would actually "not corrupt
memory"
however it will have performance that is, ultimately, a waste of effort.
adding dual 128 bit memory interfaces would be 10% utilised, because they would
receive only one 8-64 bit request.
we might as well just use minerva's L1 code directly, in full, only one
interface
with the only change being to expand it to 64 bit from 32.
in addition, misaligned requests would not
be handlee at the hardware level, leaving us non-compliant with the POWER spec.
bottom line is that the current code is for testing purposes and prototyping.
its usefulness in particular is as a "mock test" i.e. to ensure that a single
LDSTCompUnit "works" and that is why i wrote it, *not* to actually put it into
a production chip.
it can in no way be used to *properly* test the parallel capability of the
engine because it will only do one request at a time.
if we want to be taken seriously and want the performance of a GPU we need the
twin buffer implemented in the next week.
i will have the LDSTCompUnit done by then and we will need to begin testing of
parallel LD/STs.
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[not found] <bug-216-13@https.bugs.libre-soc.org/>
2020-04-19 9:51 ` bugzilla-daemon
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2020-03-11 20:28 [libre-riscv-dev] [Bug 216] New: " bugzilla-daemon
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