From: bugzilla-daemon@libre-riscv.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 216] LOAD STORE buffer needed
Date: Thu, 12 Mar 2020 11:13:46 +0000
Message-ID: <bug-216-13-kIScV8Q6EX@http.bugs.libre-riscv.org/> (raw)
In-Reply-To: <bug-216-13@http.bugs.libre-riscv.org/>
http://bugs.libre-riscv.org/show_bug.cgi?id=216
Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed:
What |Removed |Added
----------------------------------------------------------------------------
See Also| |http://bugs.libre-riscv.org
| |/show_bug.cgi?id=94
--- Comment #4 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #3)
> i am very wary of making any kind of changes to the Dependency Matrices. it
> took months to get an understanding of them, enough to implement correctly.
(and it was 10 months ago. sigh)
the load/store system is a *multi*-step process: there is the "normal"
(Register-FU and FU-FU hazard system, which takes care of the "usual"
register-based dependencies that all ALUs have including the Branch Unit),
*and* there is the inter-address LD/ST hazard Dependency Matrices.
the memory-function-unit matrices are augmented (differ from) the "normal"
register-style DMs in that they recognise 10 bits of the address as a way to
see if there was a conflict. the logic being "overzealous".
you remember we discussed that last year, jacob, because 10 bits happens to hit
the 1 MEGABYTE boundary of Vulkan Texture blocks?
what i considered doing was having, instead of a straight 10-bit address-line
comparator, shifting that up by 4 bits and having a *bit-map* comparator for
the 4 LSBs.
in other words a byte LOAD would set 1 bit in the 16 bits, a half-word 2 bits,
and so on. (actually to cover misaligned LOADs it would need to be a minimum
23 bits and/or split into *two* separate LOADs).
let us assume that the bitmap width is exactly the same as the cache line width
(16 bits representing 16 byte wide cache lines).
this bitmap - if filled by multiple LOADs - can have a popcount carried out on
it, and that tells us which "line" in the buffer has the highest number of
bytes to perform LOADs.
if the entire bitmap is all 1s, that is a full cache line of LOADs.
--
You are receiving this mail because:
You are on the CC list for the bug.
_______________________________________________
libre-riscv-dev mailing list
libre-riscv-dev@lists.libre-riscv.org
http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev
next prev parent reply index
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-11 20:28 [libre-riscv-dev] [Bug 216] New: " bugzilla-daemon
2020-03-11 22:54 ` [libre-riscv-dev] [Bug 216] " bugzilla-daemon
2020-03-11 23:08 ` bugzilla-daemon
2020-03-12 1:54 ` bugzilla-daemon
2020-03-12 11:13 ` bugzilla-daemon [this message]
2020-03-12 13:35 ` bugzilla-daemon
2020-03-12 17:29 ` bugzilla-daemon
2020-03-13 11:50 ` bugzilla-daemon
2020-03-13 18:37 ` bugzilla-daemon
2020-03-13 20:16 ` bugzilla-daemon
2020-03-15 21:19 ` bugzilla-daemon
2020-03-16 17:25 ` bugzilla-daemon
2020-03-23 10:21 ` bugzilla-daemon
2020-03-24 13:55 ` bugzilla-daemon
2020-03-24 14:22 ` bugzilla-daemon
2020-03-24 18:00 ` bugzilla-daemon
2020-03-24 20:19 ` bugzilla-daemon
2020-03-24 20:27 ` bugzilla-daemon
[not found] <bug-216-13@https.bugs.libre-soc.org/>
2020-04-19 9:51 ` bugzilla-daemon
2020-04-19 9:57 ` bugzilla-daemon
2020-04-19 15:22 ` bugzilla-daemon
2020-04-19 17:46 ` bugzilla-daemon
2020-04-20 9:10 ` bugzilla-daemon
2020-04-22 10:53 ` bugzilla-daemon
2020-04-22 12:17 ` bugzilla-daemon
2020-04-25 12:40 ` bugzilla-daemon
2020-04-26 11:28 ` bugzilla-daemon
2020-04-27 11:56 ` bugzilla-daemon
2020-04-29 11:16 ` bugzilla-daemon
2020-04-29 21:42 ` bugzilla-daemon
2020-05-01 13:27 ` bugzilla-daemon
2020-05-01 13:33 ` bugzilla-daemon
2020-05-04 10:21 ` bugzilla-daemon
2020-05-04 20:11 ` bugzilla-daemon
2020-05-06 0:33 ` bugzilla-daemon
2020-05-06 1:09 ` bugzilla-daemon
2020-05-06 1:11 ` bugzilla-daemon
2020-05-06 8:29 ` bugzilla-daemon
2020-05-06 8:42 ` bugzilla-daemon
2020-05-06 12:39 ` bugzilla-daemon
2020-05-06 13:12 ` bugzilla-daemon
2020-05-18 4:09 ` bugzilla-daemon
2020-05-23 15:17 ` bugzilla-daemon
2020-05-23 15:23 ` bugzilla-daemon
2020-05-24 19:29 ` bugzilla-daemon
2020-05-24 19:39 ` bugzilla-daemon
2020-05-25 10:36 ` bugzilla-daemon
2020-05-25 13:55 ` bugzilla-daemon
2020-05-26 12:50 ` bugzilla-daemon
2020-05-27 11:10 ` bugzilla-daemon
2020-05-28 12:35 ` bugzilla-daemon
2020-05-28 12:38 ` bugzilla-daemon
2020-05-28 13:07 ` bugzilla-daemon
2020-05-28 13:26 ` bugzilla-daemon
2020-05-28 20:34 ` bugzilla-daemon
2020-05-29 13:56 ` bugzilla-daemon
2020-05-29 16:17 ` bugzilla-daemon
2020-05-30 19:40 ` bugzilla-daemon
2020-06-02 18:26 ` bugzilla-daemon
2020-06-04 16:49 ` bugzilla-daemon
2020-06-05 19:17 ` bugzilla-daemon
2020-06-05 19:40 ` bugzilla-daemon
2020-06-07 23:42 ` bugzilla-daemon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=bug-216-13-kIScV8Q6EX@http.bugs.libre-riscv.org/ \
--to=bugzilla-daemon@libre-riscv.org \
--cc=libre-riscv-dev@lists.libre-riscv.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Libre RISC-V Mailing list Archives (accessible via public-inbox)
Archives are clonable: git clone --mirror https://inbox.libre-soc.org/libre-riscv-dev
Example config snippet for mirrors
AGPL code for this site: git clone https://public-inbox.org/public-inbox.git