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From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline
Date: Fri, 05 Jun 2020 15:12:47 +0000
Message-ID: <bug-325-13-Mh1VJtLSqp@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-325-13@https.bugs.libre-soc.org/>

https://bugs.libre-soc.org/show_bug.cgi?id=325

--- Comment #47 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
this is going to be a mess.

mtmsr pseudocode:

if L = 0 then
    MSR48 <- (RS)48 | (RS)49
    MSR58 <- ((RS)58 | (RS)49)
        & ¬(MSR41 & MSR3 & (¬(RS)49))
    MSR59 <- ((RS)59 | (RS)49)
        & ¬(MSR41 & MSR3 & (¬(RS)49))
    MSR32:40 42:47 49:50 52:57 60:62
       (RS)32:40 42:47 49:50 52:57 60:62
else:
    MSR48 62 <- (RS)48 62

i forgot to add the pseudocode from mtmsr and mfmsr to the isa markdown
files.  the above is note-form from the 3.0B PDF

mfmsr:

RT <- MSR

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2020-05-19 12:28 [libre-riscv-dev] [Bug 325] New: " bugzilla-daemon
2020-05-19 12:29 ` [libre-riscv-dev] [Bug 325] " bugzilla-daemon
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