From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline
Date: Sun, 07 Jun 2020 21:31:40 +0000
Message-ID: <bug-325-13-PAy8RsUcZ5@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-325-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=325
--- Comment #83 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Cole Poirier from comment #81)
> (In reply to Luke Kenneth Casson Leighton from comment #80)
> > it is... however look at the PDF SPEC (or see comment #1 which contains
> > the pseudo-code. that's not a function, is it?
>
> No indeed it seems more similar to a keyword.
i basically disregarded entirely the statement at the top of the POWER v3.0B
PDF, "this pseudocode is in no way intended to be an executable language"
and did exactly that. teehee
> Ah, so just translating that
> psuedo code into the TRAP method of ISACaller?
yeeees :)
> > @inject()
> > def op_twi(self, RA):
> > a = EXTS(RA[32:64])
> > if lt(a, EXTS(SI)) & TO[0]:self.TRAP()
> > if gt(a, EXTS(SI)) & TO[1]:self.TRAP()
> >
> >
> > *now* it can call the function which was added in caller.py, *now* we
> > can get that function to make the required modifications to the SPRs
> > and to the PC (NIA - Next Instruction Address).
>
> Aha, this is actually starting to make A LOT of sense :)
ta-daaaa :)
so i saw the latest commit, and added some TODO comments. if you
can do them *at the same time* as actually adding things in
caller.py ISACAller.TRAP, then you will see clearly the direct connection
between the two.
oh - yes, add a test_twi (or test_tdi) as well, you will have to
set an initial register RA, such as:
initial_regs = [0] * 32
initial_regs[2] = random.randint(0, (1<<32)-1)
or maybe do a fixed number, initially, so you know exactly what
you are testing against. remember if you set initial_regs[2]
then that means that "RA" in the instruction has to be 2.
from fixedtrap.mdwn:
D-Form
* twi TO,RA,SI
therefore, what you put in the listing, would have to be twi TO,-->2<--,SI
TO is a bitfield, saying whether you want to compare equals, greater, less-than
etc. etc.
SI is an immediate that you want to compare against register RA.
so just pick something that, *manually*, you know will be "equal", or
something.
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