[libre-riscv-dev] [Bug 376] Assess 40/45 nm 2022 target and interfaces

[bugzilla-daemon@libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=376

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---


> On Friday, June 12, 2020, Cole Poirier <colepoirier@gmail.com> wrote:
> On Jun 12 2020, at 7:06 am, Hendrik Boom <hendrik@topoi.pooq.com> wrote:
> > It's just possibe that we may not *need* 4k at 120 fps.
> > Certainly there are many potential applications for our chip that
> > don't need that kind of video. 

> I concur. If we are planning on selling 100 million units, shouldn't we
> have several different levels of IO/GPU capablilty, each targeting
> different power requirements? For example, a phone or a tablet doesn't
need 4k 120HZ video right?

correct.  this is what the original quad core was intended for.  RGBTTL
connecting directly to an 800x600 low cost LCD, or, via a TI SN75LVDS83b, to a
1024x600 or 1280x800 LCD.  or a Solomon SSD2828 to do MIPI.

the GPU and framebuffer requirements for such portable devices are far lower. 
you can even get away with only a 30fps update speed, halving the framebuffer
power and GPU requirements.

thus, only 1x 32 bit DDR 800 mhz RAM interface would be perfectly sufficient...
for *that* scenario (hence the $4 target price), and it would only need around
a 350mW power budget (the DRAMs themselves, that is.  the SoC DRAM drivers
would i *think* be around an additional 150mW. have to check).


the target being discussed here, by virtue of having interfaces that at full
speed consume an estimated 8 watts, these are far outside a tablet/smartphone
100 million+ volumes power budget.

it is basically a radically different market: GPU Graphics Card market,
basically.

*if correct*, with the (unconfirmed, anticipated) higher power demands, a
plastic package is in no way going to be adequate.

it will have to be ceramic, with a metal top.  i'd also suggest a minimum 25 mm
square, to help with thermal dissipation.

the actual pincount, due to the SERDES, might be quite reasonable (except
there's a lot of them): maybe 400 to 500 or so.

we will need people who know exactly what they are doing, here, who have done
this type of high power high speed ASIC before.

Rudi is the person who springs to mind, not just from the technical capability
and 25+ years experience, he also likes what we are doing.

we need some numbers.

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