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From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 376] Assess 40/45 nm 2022 target and interfaces
Date: Fri, 12 Jun 2020 18:13:22 +0000
Message-ID: <bug-376-13-ccXfDpwWJz@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-376-13@https.bugs.libre-soc.org/>

https://bugs.libre-soc.org/show_bug.cgi?id=376

--- Comment #13 from Jacob Lifshay <programmerjake@gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #11)
> (In reply to Jacob Lifshay from comment #7)
> > (In reply to Luke Kenneth Casson Leighton from comment #3)
> > > i am inclined to seriously recommend at least two separate OMI interfaces
> > > (with the option to use them in parallel), one to be connected to a video
> > > DRAM chip, the other to be connected to a "OS / GPU" memory DRAM chip,
> > > with the option to say "i don't care about that, just use one or both for
> > > general shared memory"
> > 
> > I strongly disagree with the idea of partitioning memory interfaces between
> > GPU and CPU tasks,
> 
> ah that is a misunderstanding, to clarify:
> 
> > > arallel), one to be connected to a video
> > > DRAM chip,
> 
> this for the video framebuffer and the video framebuffer only.

That doesn't really work, since the GPU will need lots of memory bandwidth into
the framebuffer since that's where it will be rendering to, potentially drawing
over the same pixels several dozen times. To support that, the memory bandwidth
of both the framebuffer and everything else needs to be spread across all
available memory interfaces.

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  parent reply index

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-12 13:30 [libre-riscv-dev] [Bug 376] New: " bugzilla-daemon
2020-06-12 13:31 ` [libre-riscv-dev] [Bug 376] " bugzilla-daemon
2020-06-12 13:52 ` bugzilla-daemon
2020-06-12 15:14 ` bugzilla-daemon
2020-06-12 15:27 ` bugzilla-daemon
2020-06-12 16:17 ` bugzilla-daemon
2020-06-12 16:29 ` bugzilla-daemon
2020-06-12 17:26 ` bugzilla-daemon
2020-06-12 17:34 ` bugzilla-daemon
2020-06-12 17:44 ` bugzilla-daemon
2020-06-12 18:00 ` bugzilla-daemon
2020-06-12 18:01 ` bugzilla-daemon
2020-06-12 18:08 ` bugzilla-daemon
2020-06-12 18:13 ` bugzilla-daemon [this message]
2020-06-12 21:51 ` bugzilla-daemon
2020-06-12 21:52 ` bugzilla-daemon
2020-06-12 22:00 ` bugzilla-daemon
2020-06-12 22:05 ` bugzilla-daemon
2020-06-12 22:19 ` bugzilla-daemon
2020-06-12 22:32 ` bugzilla-daemon
2020-06-12 22:55 ` bugzilla-daemon
2020-06-12 23:02 ` bugzilla-daemon
2020-06-12 23:11 ` bugzilla-daemon
2020-06-12 23:14 ` bugzilla-daemon
2020-06-13  0:20 ` bugzilla-daemon
2020-06-14  5:06   ` [libre-riscv-dev] effects of powered-off chip sections on current leakage Jacob Lifshay
2020-06-14 11:30     ` Luke Kenneth Casson Leighton
2020-06-14 20:07       ` Jacob Lifshay
2020-06-14 22:08         ` Cesar Strauss
2020-06-13  3:37 ` [libre-riscv-dev] [Bug 376] Assess 40/45 nm 2022 target and interfaces bugzilla-daemon
2020-06-14 17:27 ` bugzilla-daemon

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