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From: Cesar Strauss <cestrauss@gmail.com>
To: libre-riscv-dev@lists.libre-riscv.org
Subject: Re: [libre-riscv-dev] effects of powered-off chip sections on current leakage
Date: Sun, 14 Jun 2020 19:08:01 -0300
Message-ID: <eb862b7f-0667-778b-2825-c48cf4dd8b9f@gmail.com> (raw)
In-Reply-To: <CAC2bXD6bOLp5tS0=Q27RNkP9FpA4xFmrhqv1zJCwTaGd9h1qCQ@mail.gmail.com>

Em 14/06/2020 17:07, Jacob Lifshay escreveu:
> On Sun, Jun 14, 2020, 04:31 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
> wrote:
>> ok so if there's an actual MOSFET that cuts power to those planes,
>> there's nothing to "resist", so the idea that you came up with of
>> cutting power entirely has merit that needs a proper investigation.
> 
> 
> After a little looking around, I didn't see anything that unambiguously
> stated that turning off the power planes will reduce leakage power, however
> basically everyone I found seemed to imply that.
> 
> https://en.wikipedia.org/wiki/Power_gating

Remember also to isolate any inputs, otherwise they will tend to power
the core, and generally create a load on the line.

Happened to me the other day.

I have two board connected by I2C. I power down just one, and the power
led stays on. Power off the other instead, and the I2C bus on the first
becomes unusable.

Regards,

Cesar

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Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-12 13:30 [libre-riscv-dev] [Bug 376] New: Assess 40/45 nm 2022 target and interfaces bugzilla-daemon
2020-06-12 13:31 ` [libre-riscv-dev] [Bug 376] " bugzilla-daemon
2020-06-12 13:52 ` bugzilla-daemon
2020-06-12 15:14 ` bugzilla-daemon
2020-06-12 15:27 ` bugzilla-daemon
2020-06-12 16:17 ` bugzilla-daemon
2020-06-12 16:29 ` bugzilla-daemon
2020-06-12 17:26 ` bugzilla-daemon
2020-06-12 17:34 ` bugzilla-daemon
2020-06-12 17:44 ` bugzilla-daemon
2020-06-12 18:00 ` bugzilla-daemon
2020-06-12 18:01 ` bugzilla-daemon
2020-06-12 18:08 ` bugzilla-daemon
2020-06-12 18:13 ` bugzilla-daemon
2020-06-12 21:51 ` bugzilla-daemon
2020-06-12 21:52 ` bugzilla-daemon
2020-06-12 22:00 ` bugzilla-daemon
2020-06-12 22:05 ` bugzilla-daemon
2020-06-12 22:19 ` bugzilla-daemon
2020-06-12 22:32 ` bugzilla-daemon
2020-06-12 22:55 ` bugzilla-daemon
2020-06-12 23:02 ` bugzilla-daemon
2020-06-12 23:11 ` bugzilla-daemon
2020-06-12 23:14 ` bugzilla-daemon
2020-06-13  0:20 ` bugzilla-daemon
2020-06-14  5:06   ` [libre-riscv-dev] effects of powered-off chip sections on current leakage Jacob Lifshay
2020-06-14 11:30     ` Luke Kenneth Casson Leighton
2020-06-14 20:07       ` Jacob Lifshay
2020-06-14 22:08         ` Cesar Strauss [this message]
2020-06-13  3:37 ` [libre-riscv-dev] [Bug 376] Assess 40/45 nm 2022 target and interfaces bugzilla-daemon
2020-06-14 17:27 ` bugzilla-daemon

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