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From: Yehowshua <yimmanuel3@gatech.edu>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: [libre-riscv-dev] Minerva L1 Cache
Date: Sun, 14 Jun 2020 22:41:45 -0400
Message-ID: <8A42B0DD-1009-49A4-AEB9-DBE04836FAAE@gatech.edu> (raw)

I was running through the nMIgen Minerva Cache
codebase and would like to point out that it only 
has support for two sets. It can have an arbitrary
amount of tags, but is fixed at two sets which is 
probably notably too low performance for what 
we want.

I’m currently working on writing a Minerva like nMigen 
cache that supports as many sets as desired - hopefully
we can use that.

Yehowshua
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Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-15  2:41 Yehowshua [this message]
2020-06-15  3:02 ` Yehowshua
2020-06-15  4:32   ` Luke Kenneth Casson Leighton
2020-06-15 16:46     ` Yehowshua
2020-06-15 19:32       ` Luke Kenneth Casson Leighton
2020-06-15 19:54         ` Yehowshua
2020-06-15 20:10           ` Luke Kenneth Casson Leighton
2020-06-15 20:23             ` Yehowshua
2020-06-15 20:24               ` Yehowshua
2020-06-15 20:30               ` Yehowshua
2020-06-15 20:53                 ` Luke Kenneth Casson Leighton
2020-06-15 21:08                   ` Yehowshua
2020-06-15 21:54                     ` Luke Kenneth Casson Leighton
2020-06-16  1:39                       ` Cole Poirier
2020-06-16  1:53                         ` Luke Kenneth Casson Leighton
2020-06-16  1:58                           ` Cole Poirier
2020-06-15 22:19               ` Yehowshua
2020-06-16  0:03                 ` Luke Kenneth Casson Leighton
2020-06-15 16:57     ` Yehowshua
2020-06-15  3:09 ` Yehowshua
2020-06-15  4:30   ` Luke Kenneth Casson Leighton
2020-06-15  3:24 ` Yehowshua
2020-06-15  4:04 ` Luke Kenneth Casson Leighton
2020-06-16  0:20   ` [libre-riscv-dev] L1 cache and GPU workloads Jacob Lifshay

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